Run-time management for future MPSoC platforms (PDF)

Run-time management for future MPSoC platforms Citation for published version (APA): Nollet, V. (2008). Run-time management for future MPSoC platforms. Technische Universiteit Eindhoven. https://doi.org/10.6100/IR633897 DOI: 10.6100/IR633897 Document status and date: Published: 01/01/2008 Document Version: Publisher’s PDF, also known as Version of Record (includes final page, issue and volume numbers) Please check the document version of this publication: • A submitted manuscript is the version of the article upon submission and before peer-review. There can be important differences between the submitted version and the official published version of record. People interested in the research are advised to contact the author for the final version of the publication, or visit the DOI to the publisher's website. • The final author version and the galley proof are versions of the publication after peer review. • The final published version features the final layout of the paper including the volume, issue and page numbers. Link to publication General rights Copyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights. • Users may download and print one copy of any publication from the public portal for the purpose of private study or research. • You may not further distribute the material or use it for any profit-making activity or commercial gain • You may freely distribute the URL identifying the publication in the public portal. If the publication is distributed under the terms of Article 25fa of the Dutch Copyright Act, indicated by the “Taverne” license above, please follow below link for the End User Agreement: www.tue.nl/taverne Take down policy If you believe that this document breaches copyright please contact us at: [email protected] providing details and we will investigate your claim. Download date: 27. Jun. 2022  Run-Time management for future MPSoC platforms PROEFSCHRIFT ter verkrijging van de graad van doctor aan de Technische Universiteit Eindhoven, op gezag van de Rector Magnificus, prof.dr.ir. C.J. van Duijn, voor een commissie aangewezen door het College voor Promoties in het openbaar te verdedigen op woensdag 23 april 2008 om 16.00 uur door Vincent Nollet geboren te Veurne, Belgi¨e  Dit proefschrift is goedgekeurd door de promotor: prof.dr. H. Corporaal Copromotor: dr.ir. D.T.M.L. Verkest This work was carried out at IMEC. c⃝Copyright 2008 Vincent Nollet All rights reserved. No part of this publication may be reproduced, stored in a re- trieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without the prior written permission from the copyright owner. Cover design: Carmen Six and Vincent Nollet, cliparts from www.openclipart.org. Printed by: Procopia N.V. CIP-DATA LIBRARY TECHNISCHE UNIVERSITEIT EINDHOVEN Nollet, Vincent Run-time management for future MPSoC platforms / by Vincent Nollet. - Eindhoven : Technische Universiteit Eindhoven, 2008. Proefschrift. - ISBN 978-90-386-1804-3 NUR 959 Trefw.: operating systems / multiprocessoren / computerprestaties / ingebedde systemen. Subject headings: operating systems, computers / multiprocessing systems / resource allocation / embedded systems.  Acknowledgments T he destination has been reached. But a wise man once said:”Live for the journey, not the destination”. So, when looking back, I must say it has been a very inter- esting journey. Filled with a balance of joy and frustration, hope and despair, laughter and sadness. All these emotions have been shared with the people that I lived and worked with during this journey. I would like to express my gratitude to all of them. Particularly, I would like to thank: Henk Corporaal, my promotor, for the many discussions, motivational talks and nu- merous hours spent over the years. His wife Carola for stimulating productivity on the saturday PhD meetings with envigorating coffee and cookies. Diederik Verkest, my co-promotor, for his practical guidance and for having an open door for all kinds of problems. The PhD committee: Henk Corporaal, Diederik Verkest, Jef van Meerbergen, Francky Catthoor, Dirk Stroobandt and Johan Lukkien for investing time and energy into reading and commenting the text. Theodore Marescaux and Prabhat Avasare for being my brothers in arms and partners in crime. Erik Brockmeyer for being an always-available, idea-sparring partner and for sharing his views on design-time application mapping. I learned a lot. Wilfried Verachtert for providing me some space for writing this text. Kristof Denolf and Martin Palkoviˇc for helping me navigate through the PhD administration jungle and Tom Ashby for giving a motivated answer to all my English grammar questions. The Gecko team: Theodore Marescaux, Jean-Yves Mignolet, Prabhat Avasare, Paul Coene, Andrei Bartic, Will Moffat, Nam Pham Ngoc, Diederik Verkest and Serge Vernalde. The MPSoC team: Theodore Marescaux, Erik Brockmeyer, Arnout Vandecappelle, Sven Wuytack, Eddy Degreef, Bart Durinck, Tanja Van Achteren, Rogier Baert, Mar- tin Palkoviˇc, Geert Vanmeerbeeck, Prabhat Avasare, Chantal Ykman-Couvreur, Ste- lios Mamagkakis, Tom Ashby, Zhe Ma and Maryse Wouters The master thesis students who contributed to this work: Stefan Cosemans, Johan Leys, Jelle Welvaarts and Steven Wittens.  ii Acknowledgments My family, more in particular my mother, my sister and my godmother who sup- ported me although they often wondered why I was doing this. My parents-in-law, for boldy moving forward with the home renovations during the final PhD phase. Finally, we get to the most valuable persons. My wife Carmen, who endured all the cursing, blood, sweat and tears, late evenings and early mornings, week-ends and vacations that were consumed in producing this thesis. I would not have reached this point without her loving support. I thank her with all my heart. While finalizing this thesis, my newborn son Jolan allowed me to put things in perspective: an un- conditional smile - even when things don’t go as good or as fast as planned - always brightens up the day. –Vincent  Run-Time Management for Future MPSoC Platforms Summary I n recent years, we are witnessing the dawning of the Multi-Processor System- on-Chip (MPSoC) era. In essence, this era is triggered by the need to handle more complex applications, while reducing overall cost of embedded (handheld) devices. This cost will mainly be determined by the cost of the hardware platform and the cost of designing applications for that platform. The cost of a hardware platform will partly depend on its production volume. In turn, this means that flexible, (easily) programmable multi-purpose platforms will exhibit a lower cost. A multi-purpose platform not only requires flexibility, but should also combine a high performance with a low power consumption. To this end, MPSoC devices integrate computer architectural properties of various comput- ing domains. Just like large-scale parallel and distributed systems, they contain mul- tiple heterogeneous processing elements interconnected by a scalable, network-like structure. This helps in achieving scalable high performance. As in most mobile or portable embedded systems, there is a need for low-power operation and real-time behavior. The cost of designing applications is equally important. Indeed, the actual value of future MPSoC devices is not contained within the embedded multiprocessor IC, but in their capability to provide the user of the device with an amount of services or experiences. So from an application viewpoint, MPSoCs are designed to efficiently process multimedia content in applications like video players, video conferencing, 3D gaming, augmented reality, etc. Such applications typically require a lot of pro- cessing power and a significant amount of memory. To keep up with ever evolving user needs and with new application standards appearing at a fast pace, MPSoC platforms need to be be easily programmable. Application scalability, i.e. the ability to use just enough platform resources according to the user requirements and with respect to the device capabilities is also an important factor.  iv Summary Hence scalability, flexibility, real-time behavior, a high performance, a low power consumption and, finally, programmability are key components in realizing the suc- cess of MPSoC platforms. The run-time manager is logically located between the application layer en the plat- form layer. It has a crucial role in realizing these MPSoC requirements. As it abstracts the platform hardware, it improves platform programmability. By deciding on re- source assignment at run-time and based on the performance requirements of the user, the needs of the application and the capabilities of the platform, it contributes to flexibility, scalability and to low power operation. As it has an arbiter function between different applications, it enables real-time behavior. This thesis details the key components of such an MPSoC run-time manager and provides a proof-of-concept implementation. These key components include ap- plication quality management algorithms linked to MPSoC resource management mechanisms and policies, adapted to the provided MPSoC platform services. First, we describe the role, the responsibilities and the boundary conditions of an MPSoC run-time manager in a generic way. This includes a definition of the mul- tiprocessor run-time management design space, a description of the run-time man- ager design trade-offs and a brief discussion on how these trade-offs affect the key MPSoC requirements. This design space definition and the trade-offs are illustrated based on ongoing research and on existing commercial and academic multiprocessor run-time management solutions. Consequently, we introduce a fast and efficient resource allocation heuristic that con- siders FPGA fabric properties such as fragmentation. In addition, this thesis intro- duces a novel task assignment algorithm for handling soft IP cores denoted as hier- archical configuration. Hierarchical configuration managed by the run-time manager enables easier application design and increases the run-time spatial mapping free- dom. In turn, this improves the performance of the resource assignment algorithm. Furthermore, we introduce run-time task migration components. We detail a new run-time task migration policy closely coupled to the run-time resource assignment algorithm. In addition to detailing a design-environment supported mechanism that enables moving tasks between an ISP and fine-grained reconfigurable hardware, we also propose two novel task migration mechanisms tailored to the Network-on-Chip environment. Finally, we propose a novel mechanism for task migration initiation, based on reusing debug registers in modern embedded microprocessors. We propose a reactive on-chip communication management mechanism. We show that by exploiting an injection rate control mechanism it is possible to provide a communication management system capable of providing a soft (reactive) QoS in a NoC. We introduce a novel, platform independent run-time algorithm to perform quality management, i.e. to select an application quality operating point at run-time based on the user requirements and the available platform resources, as reported by the resource manager. This contribution also proposes a novel way to manage the inter- action between the quality manager and the resource manager. In order to have a the realistic, reproducible and flexible run-time manager testbench with respect to applications with multiple quality levels and implementation trade-  Summary v offs, we have created an input data generation tool denoted Pareto Surfaces For Free (PSFF). The the PSFF tool is, to the best of our knowledge, the first tool that generates multiple realistic application operating points either based on profiling information of a real-life application or based on a designer-controlled random generator. Finally, we provide a proof-of-concept demonstrator that combines these concepts and shows how these mechanisms and policies can operate for real-life situations. In addition, we show that the proposed solutions can be integrated into existing platform operating systems.  vi Summary  Contents Acknowledgments i Summary iii Table of Contents vii 1 Key MPSoC Requirements 1 1.1 Dawning of the Multi-Processor System-on-Chip Era . . . . . . . . . . 3 1.1.1 Motivating the MPSoC Revolution . . . . . . . . . . . . . . . . . 3 1.1.2 Definition and Motivation of the MPSoC Requirements . . . . . 4 1.2 The MPSoC Platform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2.1 Heterogeneous Processing Elements . . . . . . . . . . . . . . . . 6 1.2.2 Flexible on-Chip Interconnect . . . . . . . . . . . . . . . . . . . . 9 1.2.3 MPSoC Memory Hierarchy . . . . . . . . . . . . . . . . . . . . . 9 1.3 The Rise of Multimedia Services . . . . . . . . . . . . . . . . . . . . . . 10 1.4 MPSoC Run-Time Management . . . . . . . . . . . . . . . . . . . . . . . 11 1.4.1 Role in Addressing the MPSoC Requirements . . . . . . . . . . 12 1.4.2 Application Composability . . . . . . . . . . . . . . . . . . . . . 13 1.4.3 Problem Statement . . . . . . . . . . . . . . . . . . . . . . . . . . 15 1.5 Main Contributions and Thesis Outline . . . . . . . . . . . . . . . . . . 15 1.6 Contributions Acknowledgments . . . . . . . . . . . . . . . . . . . . . . 18 2 A Safari Through the MPSoC Run-Time Management Jungle 21 2.1 MPSoC Run-time Management Constraints . . . . . . . . . . . . . . . . 22 2.2 Run-Time Management Functionality . . . . . . . . . . . . . . . . . . . 23 2.2.1 System Management . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.2.2 Associated Platform Run-Time Library . . . . . . . . . . . . . . 29 2.3 Run-Time Management Implementation Space . . . . . . . . . . . . . . 31  viii Contents 2.3.1 Centralized versus Distributed . . . . . . . . . . . . . . . . . . . 31 2.3.2 Hardware versus Software . . . . . . . . . . . . . . . . . . . . . 33 2.3.3 Adaptive versus Non-Adaptive . . . . . . . . . . . . . . . . . . . 35 2.4 Multiprocessor Run-Time Management Examples . . . . . . . . . . . . 38 2.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3 Task Assignment in an MPSoC containing FPGA Tiles 47 3.1 The Rationale of Reconfigurable Systems . . . . . . . . . . . . . . . . . 48 3.2 Fine-Grain Reconfigurable Hardware in a Nutshell . . . . . . . . . . . . 49 3.3 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 3.4 Generic MPSoC Task Mapping Heuristic . . . . . . . . . . . . . . . . . . 53 3.5 Reconfigurable Hardware Correction Factors . . . . . . . . . . . . . . . 57 3.6 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 3.7 Heuristic Performance Evaluation . . . . . . . . . . . . . . . . . . . . . 59 3.7.1 Generic Heuristic . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 3.7.2 Heuristic with Correction Factors . . . . . . . . . . . . . . . . . 62 3.8 Exploiting a Configuration Hierarchy . . . . . . . . . . . . . . . . . . . 63 3.8.1 Rationale of Hierarchical Configuration . . . . . . . . . . . . . . 63 3.8.2 Prioritizing Softcores . . . . . . . . . . . . . . . . . . . . . . . . . 66 3.8.3 Hierarchical Correction Factor . . . . . . . . . . . . . . . . . . . 66 3.8.4 Hierarchical Support into the Generic Heuristic . . . . . . . . . 68 3.9 Hierarchical Task Assignment Evaluation . . . . . . . . . . . . . . . . . 70 3.9.1 Hierarchical FPGA Correction Factor . . . . . . . . . . . . . . . 71 3.9.2 Hierarchical Configuration Heuristic . . . . . . . . . . . . . . . 71 3.10 Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 3.10.1 Run-Time Management of an FPGA Fabric Tile . . . . . . . . . 73 3.10.2 Hierarchical Configuration . . . . . . . . . . . . . . . . . . . . . 75 3.10.3 Heterogeneous MPSoCs Resource Assignment . . . . . . . . . . 77 3.11 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 4 Task Migration in the MPSoC Environment 81 4.1 Run-Time Task Migration Introduction . . . . . . . . . . . . . . . . . . . 82 4.1.1 Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 4.1.2 Benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 4.1.3 Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 4.1.4 Migration Mechanism Benchmarking . . . . . . . . . . . . . . . 84 4.2 Task Migration Policy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 4.2.1 Migration After Mapping Failure . . . . . . . . . . . . . . . . . . 86 4.2.2 Migration After Co-Assignment of Applications . . . . . . . . . 90 4.2.3 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . 91 4.2.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 92  Contents ix 4.3 Heterogeneous Task Migration Infrastructure . . . . . . . . . . . . . . . 95 4.3.1 Uniform Communication Infrastructure . . . . . . . . . . . . . . 95 4.3.2 HW/SW Migration Issues . . . . . . . . . . . . . . . . . . . . . . 96 4.3.3 A HW/SW Migration Case Study . . . . . . . . . . . . . . . . . 97 4.4 Handling Message Consistency in a NoC . . . . . . . . . . . . . . . . . 99 4.4.1 Generic Task Migration Mechanism . . . . . . . . . . . . . . . . 99 4.4.2 Pipeline Migration Mechanism . . . . . . . . . . . . . . . . . . . 100 4.4.3 Migration Mechanism Analysis . . . . . . . . . . . . . . . . . . . 103 4.5 Low Cost Task Migration Initiation . . . . . . . . . . . . . . . . . . . . . 107 4.5.1 Migration Initiation Taxonomy . . . . . . . . . . . . . . . . . . . 107 4.5.2 Hardware Supported Migration Initiation . . . . . . . . . . . . . 108 4.6 Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 4.6.1 Task Migration Policies . . . . . . . . . . . . . . . . . . . . . . . 109 4.6.2 Managing Task State in a Heterogeneous System . . . . . . . . . 111 4.6.3 Ensuring Message Consistency . . . . . . . . . . . . . . . . . . . 112 4.6.4 Task Migration Initiation . . . . . . . . . . . . . . . . . . . . . . 114 4.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 5 Reactive Communication Management of a NoC 117 5.1 NoC Communication Management Concepts . . . . . . . . . . . . . . . 118 5.1.1 Components of Reactive Communication Control . . . . . . . . 119 5.1.2 Flow-Control versus Congestion-Control . . . . . . . . . . . . . 120 5.2 Actuator - Injection Rate Control . . . . . . . . . . . . . . . . . . . . . . 122 5.2.1 Mechanism Concept . . . . . . . . . . . . . . . . . . . . . . . . . 123 5.2.2 Theoretical Aspects of Injection Rate Control . . . . . . . . . . . 124 5.2.3 Traffic Shaping - Proof-of-Concept . . . . . . . . . . . . . . . . . 124 5.3 Monitoring and Decision-Making . . . . . . . . . . . . . . . . . . . . . . 127 5.3.1 Decision-Making Axis . . . . . . . . . . . . . . . . . . . . . . . . 127 5.3.2 Monitoring Axis . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 5.3.3 Design-Space Choices . . . . . . . . . . . . . . . . . . . . . . . . 131 5.4 Global Connection-Level Management . . . . . . . . . . . . . . . . . . . 132 5.4.1 Setting and Problem Definition . . . . . . . . . . . . . . . . . . . 132 5.4.2 Base Window Management Algorithm . . . . . . . . . . . . . . 136 5.4.3 Base Algorithm Experimental Results . . . . . . . . . . . . . . . 139 5.4.4 Case Study on the Gecko2 Emulator . . . . . . . . . . . . . . . . 141 5.4.5 Algorithm Improvements . . . . . . . . . . . . . . . . . . . . . . 143 5.5 Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147 5.6 Conclusions and Future Work . . . . . . . . . . . . . . . . . . . . . . . . 149 6 Gecko Proof-of-Concept Platforms 151 6.1 Gecko Platform Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . 152  x Contents 6.1.1 NoC Data Router Design . . . . . . . . . . . . . . . . . . . . . . 154 6.1.2 Data Network Interfaces . . . . . . . . . . . . . . . . . . . . . . . 155 6.1.3 Control Network Interfaces . . . . . . . . . . . . . . . . . . . . . 156 6.1.4 Hardware Implementation Results . . . . . . . . . . . . . . . . . 158 6.2 Gecko Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159 6.2.1 Envisioned Application Scenario . . . . . . . . . . . . . . . . . . 159 6.2.2 Driver Applications . . . . . . . . . . . . . . . . . . . . . . . . . 160 6.3 Run-Time Resource Management . . . . . . . . . . . . . . . . . . . . . . 162 6.3.1 Extending an Existing RTOS . . . . . . . . . . . . . . . . . . . . 162 6.3.2 Flow for Starting an Application . . . . . . . . . . . . . . . . . . 163 6.3.3 Supporting a Configuration Hierarchy . . . . . . . . . . . . . . . 164 6.4 Proof-of-Concept Demos . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 6.4.1 Gecko I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 6.4.2 Gecko2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166 6.4.3 RESUME Run-Time Manager . . . . . . . . . . . . . . . . . . . . 170 6.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171 7 Run-Time Quality Management 173 7.1 Adaptive Quality Management Overview . . . . . . . . . . . . . . . . . 174 7.1.1 Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 7.1.2 Application Adaptivity: QSDPCM Case Study . . . . . . . . . . 178 7.1.3 Exploiting Multiple Application Implementations . . . . . . . . 180 7.1.4 Quality Management Issues . . . . . . . . . . . . . . . . . . . . . 183 7.2 Solving the MMKP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183 7.2.1 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . 183 7.2.2 Operating Point Selection Heuristic . . . . . . . . . . . . . . . . 184 7.2.3 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . 187 7.2.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 188 7.3 Quality Management Interfaces . . . . . . . . . . . . . . . . . . . . . . . 188 7.3.1 Flexibility and Scalability Issues . . . . . . . . . . . . . . . . . . 189 7.3.2 Interface between Quality Manager and Resource Manager . . 191 7.3.3 Design-Time/Run-Time Interface . . . . . . . . . . . . . . . . . 193 7.3.4 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . 196 7.3.5 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 198 7.4 Quality Manager and Resource Manager Integration . . . . . . . . . . . 202 7.4.1 Integration and Collaboration Description . . . . . . . . . . . . 203 7.4.2 Operating Point Selection From Scratch . . . . . . . . . . . . . . 204 7.4.3 Single Set Selection with Failure Mechanism . . . . . . . . . . . 206 7.4.4 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . . . . 208 7.4.5 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 210  Contents xi 7.5 Related Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 7.5.1 Solving the MMKP . . . . . . . . . . . . . . . . . . . . . . . . . . 214 7.5.2 Operating Point Selection and Application Quality . . . . . . . 215 7.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 8 Conclusion & Future Work 219 8.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 8.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224 8.2.1 Lacunae . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225 8.2.2 MPSoC Task Scheduling . . . . . . . . . . . . . . . . . . . . . . . 225 8.2.3 Design-time Mapping and Run-time Management . . . . . . . . 231 8.2.4 The Many-Core Run-Time Management Future . . . . . . . . . . 232 8.2.5 Deep Deep Sub-Micron Run-Time Management Needs . . . . . 233 8.3 Concluding Remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235 A PSFF: Pareto Surfaces For Free 237 A.1 Operating Point Generation . . . . . . . . . . . . . . . . . . . . . . . . . 238 A.1.1 Functional Split . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240 A.1.2 Data Split . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241 A.1.3 Applying Trade-offs . . . . . . . . . . . . . . . . . . . . . . . . . 243 A.2 Generating Random Surfaces . . . . . . . . . . . . . . . . . . . . . . . . 243 A.3 QSDPCM Operating Points . . . . . . . . . . . . . . . . . . . . . . . . . 244 A.4 Random Operating Point Surfaces . . . . . . . . . . . . . . . . . . . . . 246 A.5 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249 B TGFF Input Values 251 C IMEC MPSoC Application Design and Mapping 253 C.1 Application Mapping Flow and Tools . . . . . . . . . . . . . . . . . . . 254 C.2 Application Design Exploration . . . . . . . . . . . . . . . . . . . . . . . 255 C.2.1 Memory Size versus Bandwidth Exploration . . . . . . . . . . . 255 C.2.2 Parallelization Exploration . . . . . . . . . . . . . . . . . . . . . 257 C.2.3 IMEC MPSoC Design Tools . . . . . . . . . . . . . . . . . . . . . 257 C.2.4 Design-Time Tools and Run-Time Management . . . . . . . . . 258 C.3 Concluding Remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259 Bibliography 260 List of Publications 276 Curriculum Vitae 281 Index 283  xii Contents